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Scientific papers

Scaling Logic Locking Schemes to Multi-Module Hardware Designs

Šišejković, D. , Merchant, F. , Reimann, L. M. , Leupers, R.

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Inter-Lock: Logic Encryption for Processor Cores Beyond Module Boundaries

Šišejković, D. , Merchant, F. , Leupers, R. , Ascheid, G. , Kegreiß, S.

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Control-Lock: Securing Processor Cores Against Software-Controlled Hardware Trojans

Šišejković, D. , Merchant, F. , Leupers, R. , Ascheid, G. , Kegreiß, S.

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A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms

Šišejković, D. , Merchant, F. , Leupers, R. , Ascheid, G. , Kiefer, V.

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A Unifying Logic Encryption Security Metric

Šišejković, D. , Leupers, R. , Ascheid, G. , Metzner, S.

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Exploring the RISC-V Vector Extension for the Classic McEliece Post-Quantum Cryptosystem

S. Pircher; J. Geier; A. Zeh; D. Mueller-Gritschneder

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Decoding of (Interleaved) Generalized Goppa Codes

Hedongliang Liu; Sabine Pircher; Alexander Zeh; Antonia Wachter-Zeh

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